Design and implementation of FPGA download interface

number: 
2049
إنجليزية
Degree: 
Author: 
Firas Qais Mohamed Saleh
Supervisor: 
Dr. Mohammed A. Abdala
year: 
2009

Abstract:The FPGA download interface is a major problem in Iraq due to the shortage of resources and components in the electronic field which leads to simulate most projects in Iraq. The aim of the project is to design and implement an interface circuit to configure the Field Programmable Gate Array (FPGA) by downloading the configuration file from the computer to the FPGA via the designed circuit. For this the Parallel Port in the Enhanced mode is used to implement the downloading operation and to debug the downloaded file in the FPGA . The Altera FPT board which contains Flex 10k10 series is programmed using the Very high speed Integrated Hardware Descriptive Language (VHDL) editor tool in the Quartus II Program which is the software presented from Altera, the manufacturer of the used FPGA, that manages and controls Altera's products. The designed interface circuit consists of the printer's parallel cable, voltage regulator, buffer, clock, voltage source and peripherals like light emitting diodes. The interface was tested using the Quartus II synthesis tool and a counter program written in VHDL was downloaded to the FPGA in the FPT board. A correct download report was appeared in the Quartus II indicating to the completion of the download process and the succeeding of the designed download circuit. Also the output was taken from the peripheral LEDs taken from the FPGA which worked as a counter as it was designed which represent a counting binary numbers .