Simulation of first order PCM multiplexer

number: 
777
Undefined
Degree: 
Author: 
Asa'ad J. Kadhim Al-Aneezy
Supervisor: 
Dr.Ameer A. Naoom
year: 
2002
Abstract:

The simulation of first order PCM multiplexer has been achieved by designing the system on the basis of implementing its functions using simple logic for the logic circuits (logic gates) as software, and then using the Matlab Simulink as the simulator. The simulated system was constructed to meet the basic requirements of ITU-T Recommendation G.703, G704, G706, G732 and G823 related to line coding and pulse shaping, frame structure types (FAS, CRC-4, CAS and CCS), modified CRC-4 multiframe, errors detection and jitter tolerance respectively, are simulated.The simulated multiplexer is composed of two parts mainly, the transmitter and receiver, ^irst, the transmitted function was defined in regards to its clock, data inputs, framing insertion, line coding and pulse shaping. The above functions were simulated integrated, run on the Matlab Simulink and checked successfully by observe timing diagrams for its agreement with the requirements. Second, the received function was defined in regard to line decoding, regenerator unit, framing synchronization and elastic store. The received performance in regards to clock and data recovery was checked successfully by observe timing diagrams for different functions.